View SP8647_1061473.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Obsolescence Notice
This product is obsolete. This information is available for your convenience only. For more information on Zarlink's obsolete products and replacement product lists, please visit
http://products.zarlink.com/obsolete_products/
DS3643-1*2
SP8647
250MHz410/11 4
The SP8647 is an ECL variable modulus divider, with ECL10K and TTL/CMOS compatible outputs. It divides by 10 when either of the ECL control inputs, PE1 or PE2, is in the high state and by 11 when both are low (or open circuit). The two clock inputs are interchangeable and either will act as a clock inhibit when connected to an ECL high level. Normally, one input is left open circuit and the other is ACcoupled, with externally applied bias.
CLOCK INPUT 1 CONTROL INPUTS
1 2 3 4 16 15 14 13
CLOCK INPUT 2 NC NC NC VEE TTL/CMOS OUTPUT NC ECL OUTPUT
PE1 PE2
NC VCC NC NC
SP8647
5 6 7 8 12 11 10
FEATURES
s ECL Compatible Inputs/Outputs s Open Collector TTL/CMOS Output s AC-Coupled Input (External Bias)
QUICK REFERENCE DATA
ECL OUTPUT
9
DG16
Fig. 1 Pin connections - top view
s Supply Voltage: 25*2V60*25V (ECL), 5*0V60*25V (TTL) s Power Consumption: 260mW s Temperature Range: 230C to 170C
ABSOLUTE MAXIMUM RATINGS
Supply voltage, |VCC2VEE| Output current Storage temperature range Max. junction temperature Open collector voltage (pin 11) Max. clock input voltage Max. open collector current 8V 20mA 265C to 1150C 1175C 112V 2*5V p-p 15mA
ORDERING INFORMATION
SP8647 B DG 5962-90618 (SMD)
VCC 5 11 TTL/CMOS OUTPUT
D1 PE1 PE2 CLOCK INPUT 1 CLOCK INPUT 2 2 3 1 16 CK
Q1
D2
Q2
D3
Q3
D4
Q4
8
OUTPUT
CK
CK
CK Q4
9
OUTPUT
12 VEE
Fig. 2 Functional diagram
SP8647
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, the Electrical Characteristics are guaranteed over specified supply, frequency and temperature range ECL OPERATION Supply voltage, VCC = 0V, VEE = 25*2V 6 0*25V Temperature, TAMB = 230C to 170C Characteristic Value Symbol fMAX fMIN IEE VOH VOL VINH VINL tp ts tr Min. 250 50 65 20*7 21*5 21*62 6 2*5 3 Max. MHz MHz mA V V V V ns ns ns Input = 400-800mV p-p Input = 400-800mV p-p VEE = 25*2V VEE = 25*2V (25C) VEE = 25*2V (25C) VEE = 25*2V (25C) VEE = 25*2V (25C) 5 5 5 Units Conditions Notes
Maximum frequency (sinewave input) Minimum frequency (sinewave input) Power supply current ECL output high voltage ECL output low voltage Clock and PE input high voltage Clock and PE input low voltage Clock to ECL output delay Set-up time Release time
20*85 21*8 20*93
6 3, 6 4, 6
TTL OPERATION Supply voltage, VCC = 5V 6 0*25V, VEE = 0V Temperature, TAMB = 230C to 170C Characteristic Symbol fMAX fMIN IEE VOL VOH tPLH tPHL ts tr Value Min. 250 50 65 0*5 3*5 15 15 2*5 3 Max. MHz MHz mA V V ns ns ns ns Input = 400-800mV p-p Input = 400-800mV p-p VCC = 5*25V, sink current = 8mA VCC = 5*0V 5 5 5 5, 7 5, 7 6 6 3, 6 4, 6 Units Conditions Notes
Maximum frequency (sinewave input) Minimum frequency (sinewave input) Power supply current TTL output low voltage TTL output high voltage Clock to TTL output high delay,1ve going Clock to TTL output low delay,2ve going Set-up time Release time
NOTES 1. The temperature coefficients of VOH = 11*63mV/C, VOL = 10*94mV/C and of VIN = 11*22mV/C. 2. The test configuration for dynamic testing is shown in Fig.6. 3. The set-up time ts is defined as the minimum time that can elapse between LH transition of control input and the next LH clock pulse transition to ensure that the 410 mode is obtained. 4. The release time tr is defined as the minimum time that can elapse between HL transition of control input and the next LH clock pulse transition to ensure that the 411 mode is obtained. 5. Tested at 25C only. 6. Guaranteed but not tested. 7. The open collector output is not recommended for use at output frequencies above 15MHz. CLOAD < 5pF.
INPUT AMPLITUDE (mV p-p)
1200 1000 800 600 400 200 0 0 100 200 INPUT FREQUENCY (MHz) 300 TAMB = 230C TO 170C
GUARANTEED * OPERATING WINDOW
* Tested as specified
in table of Electrical Characteristics
Fig. 3 Typical input characteristic
2
SP8647
TRUTH TABLE FOR CONTROL INPUTS
tr
PE INPUT
CLOCK INPUT
ts
PE1 L H L H
PE2 L L H H
Division ratio 11 10 10 10
6 OUTPUT 5
5
Fig. 4 Timing diagram
j1 j 0.5 j2
j 0.2 j5
0
0.2
0.5
1
2
5 50 100 150 2j 5
2j 0.2
250
200
2j 2 2j 0.5 2j 1
Fig. 5 Typical input impedance. Test conditions: Supply Voltage = 5V, Ambient Temperature = 25C. Frequencies in MHz, impedances normalised to 50.
OPERATING NOTES
1. The clock and control inputs are ECLIII compatible. There is an internal pulldown resistor to V EE of 4*3k on each input and therefore any unused input can be left open circuit. If it is desirable to capacitively couple the signal source to the clock then an external bias is required as shown in Fig. 6. The external bias voltage should be 21*3V at 25C. 2. The outputs are compatible with ECLII but can be interfaced to ECL10K as shown in Fig.8. 3. The circuit will operate down to DC but slew rate must be better than 100V/s. 4. Input impedance is a function of frequency. See Fig. 5. 5. The TTL/CMOS output is a free collector, with an output rise/fall time which is a function of load resistance and load capacitance. The load capacitance should therefore be kept to a minimum and the load resistance should not be too small otherwise V OL will be too great. For example, TTL output current = 8mA, V OL = 0*5V. For CMOS outputs, the value of load resistor should be the maximum consistent with satisfactory rise times. 6. All components should be suitable for the frequency in use.
3
SP8647
1N4148 91 16 33 TO SAMPLING SCOPE 33 750 1 1n 20 25*2V 1n
1n INPUT FROM GENERATOR
5 9
450 450
0.1 0.1 OUTPUTS TO SAMPLING SCOPE
DUT
12
8
Fig. 6 Test circuit
TTL CONTROL INPUTS 0 = 411 1 = 410
15V 1N4148 1n VCC 10n 91 1 680 4*3k 4*3k TP1 4*3k 8 5 2 3 1*5k 680
DIVIDE BY 10/11
16 9 11 750 4*3k 2k 2k TTL OUTPUT
12 VEE (0V)
0V
Fig. 7 Typical application showing TTL interfacing. NB: Voltage at TP1 should be 13*75V at 25C.
PIN 8 OR 9 47 ECL OUTPUT 1*5k 25*2V
Fig. 8 Interfacing to ECL10K
4
SP8647
NOTES
5
SP8647
PACKAGE DETAILS
Dimensions are shown thus: mm (in).
1 5*59/7*87 (0*220/0*310) 16 0*20/0*36 (0*008/0*014) PIN 1 REF NOTCH 7*62 (0*3) NOM CTRS
1*14/1*65 (0*045/0*065) 20*32 (0*800) MAX
SEATING PLANE
5*08/(0*20) MAX
0*51 (0*02) 3*18/4*06 MIN (0*125/0*160)
0*36/0*58 (0*014/0*23)
16 LEADS AT 2*54 (0*10) NOM. SPACING
NOTES 1. Controlling dimensions are inches. 2. This package outline diagram is for guidance only. Please contact your GPS Customer Service Centre for further information.
16-LEAD CERAMIC DIL - DG16
HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire SN2 2QW, United Kingdom. Tel: (0793) 518000 Fax: (0793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017 1500 Green Hills Road, Scotts Valley, CA95067-0017 United States of America. Tel (408) 438 2900 Fax: (408) 438 5576
CUSTOMER SERVICE CENTRES q FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax : (1) 64 46 06 07 q GERMANY Munich Tel: (089) 3609 06-0 Fax : (089) 3609 06-55 q ITALY Milan Tel: (02) 66040867 Fax: (02) 66040993 q JAPAN Tokyo Tel: (3) 5276-5501 Fax: (3) 5276-5510 q NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023. q SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 q SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 q UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (0793) 518510 Fax : (0793) 518582 These are supported by Agents and Distributors in major countries world-wide. (c) GEC Plessey Semiconductors 1994 Publication No. DS3643 Issue No. 1.2 March 1994
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior knowledge the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.
6

▲Up To Search▲

Price & Availability of SP8647

	To Download SP8647 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .